Exploiting Software-level Abstractions To Support Practical Hardware Trojan Attacks

SURF: CPU Trojans Activated Without Arbitrary Code Execution

Athanasios Moschos; Kevin Valakuzhy; Georgios Kokolakis; Fabian Monrose; Angelos D. Keromytis· 2026· DOI 10.48550/arXiv.2609.23173

The core problem

Hardware trojan (HT) attacks against CPUs conventionally assume that an adversary can execute arbitrary machine-level instructions to interact with an implanted trojan. On end-user devices such as mobiles and laptops, achieving arbitrary code execution requires software exploits tailored to each specific target. These strong adversarial premises reduce the generality of existing threat models and cast doubt on CPU trojan attacks as a pragmatic threat vector. To push the envelope on HT attacks against client devices, the authors introduce the SURF class of CPU-trojans that can be activated without arbitrary code execution. The key insight is that integer operations expressed in a high-level language can be mapped to microarchitectural side-effects distinguishable by a SURF trigger circuit. This observation unlocks HT activation via runtime engines—constrained environments executing untrusted high-level code. The work demonstrates a SURF trojan inside a RISC-V processor and exploits JavaScript-level memory indexing operations inside Google's V8 engine to perform a code injection attack. Importantly, SURF trojans remain effective across multiple JavaScript engine versions, enabling lo

The authors successfully demonstrate a SURF trojan in a RISC-V processor. By exploiting JavaScript-level memory indexing operations inside Google's V8 engine, they achieve a code injection attack. The trojan remains effective across multiple JavaScript engine versions, indicating that the attack vector is not tied to a single version and can enable long-term compromise of endpoint devices. The trigger circuit reliably distinguishes the microarchitectural side-effects of the targeted integer operations from normal execution noise. The code injection attack serves as a proof-of-concept payload, but the SURF class is general and could support other malicious actions. The open-source release of the design and supporting software provides a foundation for further research and validation. The results confirm that hardware trojans can be activated without arbitrary code execution, significantly lowering the adversarial prerequisites for practical attacks on client devices.

Hardware trojan (HT) attacks against CPUs conventionally assume that an adversary can execute arbitrary machine-level instructions to interact with an implanted trojan. On end-user devices such as mobiles and laptops, achieving arbitrary code execution requires software exploits tailored to each specific target. These strong adversarial premises reduce the generality of existing threat models and cast doubt on CPU trojan attacks as a pragmatic threat vector. To push the envelope on HT attacks against client devices, the authors introduce the SURF class of CPU-trojans that can be activated without arbitrary code execution. The key insight is that integer operations expressed in a high-level language can be mapped to microarchitectural side-effects distinguishable by a SURF trigger circuit. This observation unlocks HT activation via runtime engines—constrained environments executing untrusted high-level code. The work demonstrates a SURF trojan inside a RISC-V processor and exploits JavaScript-level memory indexing operations inside Google's V8 engine to perform a code injection attack. Importantly, SURF trojans remain effective across multiple JavaScript engine versions, enabling long-term compromise of endpoint devices. The design and supporting software are open-sourced to facilitate research.

The SURF methodology centers on mapping high-level integer operations to microarchitectural side-effects that can be detected by a dedicated trigger circuit. Instead of requiring arbitrary code execution, the trojan listens for specific patterns of integer operations that arise naturally during the execution of untrusted high-level code in runtime engines. The authors implement a SURF trojan inside a RISC-V processor and integrate it with Google's V8 JavaScript engine. The trigger circuit monitors microarchitectural events such as cache accesses or execution unit utilization that correlate with particular integer operations. When the predefined pattern is detected, the trojan activates a payload—in this case, a code injection attack. The approach is evaluated across multiple JavaScript engine versions to assess longevity and reliability. The design is open-sourced, including the hardware trojan logic and supporting software, to enable reproducibility and further research. The methodology emphasizes practicality: it avoids the need for tailored software exploits and instead leverages the ubiquitous execution of high-level code in constrained environments.

The SURF approach challenges the assumption that CPU trojan attacks require arbitrary code execution. By leveraging software-level abstractions—specifically, high-level integer operations in runtime engines—the attack surface expands to any environment that executes untrusted high-level code, such as web browsers. This makes hardware trojans a more pragmatic threat for end-user devices. The effectiveness across multiple JavaScript engine versions suggests that defenders cannot simply patch a single engine version to mitigate the threat; instead, hardware-level countermeasures or runtime monitoring may be necessary. The open-source nature of SURF facilitates further research into both attack and defense. However, the work also raises questions about the generality of the trigger mechanism: can it be adapted to other high-level languages or runtime environments? What are the limits of microarchitectural side-effect detection in noisy real-world conditions? The authors' decision to open-source the design invites the community to explore these questions. Overall, SURF represents a significant step toward practical hardware trojan attacks, emphasizing the need for a reevaluation of threat models that assume arbitrary code execution as a prerequisite.

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