Ilmu Komputer & AI editorial
Open AccessOA2026
A HIP-Compatible Accelerator Backend for Fourier-Bessel Particle-in-Cell Simulations on CPU/DCU Heterogeneous Clusters
Porting FBPIC to DCU accelerators with HIP: performance, scalability, and lessons learned
Jingliang Fan; Ruiqing He; Yang Wan; Jiandong Shang; Hengliang Guo; Qiang Chen· 2026· DOI 10.48550/arXiv.2609.06680
The core problem
FBPIC (Fourier-Bessel particle-in-cell) is a high-performance simulation code for relativistic plasma and accelerator physics. Its original accelerator backend relies on Numba CUDA, which limits its direct deployment on accelerators using the HIP (Heterogeneous-Compute Interface for Portability) programming environment, such as DCU (Deep Computing Unit) accelerators. This work addresses this limitation by developing an accelerator backend compatible with HIP that enables FBPIC to run efficiently on DCU platforms while preserving its Python user interface and high-level simulation workflow. The primary objective is to evaluate the performance and scalability of the proposed backend on laser-wakefield acceleration (LWFA) workloads, comparing against the original FBPIC implementation on NVIDIA V100 GPUs and demonstrating efficient execution on DCU platforms. The study also summarizes key lessons learned from porting FBPIC to the DCU platform, providing a practical reference for porting and optimizing other scientific computing applications developed with Python on heterogeneous accelerator platforms.
Innovation
For the evaluated LWFA workloads, the proposed HIP-compatible backend achieves 1.32–1.54× speedups over the original FBPIC implementation on an NVIDIA V100 GPU. This indicates that the HIP backend not only enables portability but also improves performance on NVIDIA hardware. On the DCU platform, the backend enables efficient execution, demonstrating that FBPIC can be deployed on DCU accelerators without sacrificing performance. Multi-DCU experiments show a 1.88× strong-scaling speedup on four accelerators, meaning that using four DCUs reduces the runtime by a factor of 1.88 compared to a single DCU. The aggregate throughput increases by 2.72× at approximately 68% weak-scaling efficiency. Weak-scaling efficiency is defined as the ratio of the runtime on one accelerator to the runtime on accelerators when the problem size scales with . A 68% efficiency indicates that the overhead of communication and synchronization grows with the number of accelerators, but the system still provides substantial throughput gains. Communication analysis identifies inter-node communication and synchronization as the main scalability limitations. The speedup and efficiency metrics are summarized
FBPIC (Fourier-Bessel particle-in-cell) is a high-performance simulation code for relativistic plasma and accelerator physics. Its original accelerator backend relies on Numba CUDA, which limits its direct deployment on accelerators using the HIP (Heterogeneous-Compute Interface for Portability) programming environment, such as DCU (Deep Computing Unit) accelerators. This work addresses this limitation by developing an accelerator backend compatible with HIP that enables FBPIC to run efficiently on DCU platforms while preserving its Python user interface and high-level simulation workflow. The primary objective is to evaluate the performance and scalability of the proposed backend on laser-wakefield acceleration (LWFA) workloads, comparing against the original FBPIC implementation on NVIDIA V100 GPUs and demonstrating efficient execution on DCU platforms. The study also summarizes key lessons learned from porting FBPIC to the DCU platform, providing a practical reference for porting and optimizing other scientific computing applications developed with Python on heterogeneous accelerator platforms.
The methodology involves replacing the Numba CUDA backend with a HIP-compatible implementation. The HIP programming model allows code to be portable across AMD and NVIDIA GPUs, as well as DCU accelerators. The porting process required adapting kernel launches, memory management, and synchronization primitives to the HIP API while maintaining the Python interface and simulation workflow. The backend was integrated into FBPIC without altering the user-facing Python API, ensuring that existing simulation scripts remain compatible. Performance evaluation was conducted using LWFA workloads, which are representative of relativistic plasma and accelerator physics simulations. The experiments compared the proposed HIP backend against the original Numba CUDA backend on an NVIDIA V100 GPU. Additionally, multi-DCU experiments were performed to assess strong and weak scaling. Strong scaling was measured by increasing the number of accelerators while keeping the problem size fixed, and weak scaling was measured by increasing both the problem size and the number of accelerators proportionally. Communication analysis was performed to identify scalability limitations. The key performance metrics include speedup, aggregate throughput, and weak-scaling efficiency. The mathematical formulation of the particle-in-cell method remains unchanged; the focus is on the computational backend. For a typical PIC cycle, the update of particle positions and momenta can be expressed as:
Why it matters
The results demonstrate that the HIP-compatible backend successfully enables FBPIC to run on DCU platforms while preserving the Python user interface and high-level simulation workflow. The speedups on NVIDIA V100 (1.32–1.54×) suggest that the HIP implementation is not merely a port but also an optimization, possibly due to better kernel launch configurations or memory access patterns. The multi-DCU experiments reveal that strong scaling is limited by inter-node communication and synchronization, as indicated by the 47% strong-scaling efficiency on four accelerators. Weak scaling achieves 68% efficiency, which is respectable but leaves room for improvement. The communication analysis points to inter-node communication as the primary bottleneck, suggesting that future work could focus on optimizing communication patterns, such as using asynchronous communication or overlapping computation with communication. The lessons learned from porting FBPIC to the DCU platform include the importance of minimizing data transfers between host and device, the need for careful synchronization to avoid race conditions, and the benefits of maintaining a high-level Python interface for user productivity. The proposed approach provides a practical reference for porting and optimizing other scientific computing applications developed with Python on heterogeneous accelerator platforms. The taxonomy candidates (Architecture, Cybersecurity, Network, Cryptography) are not directly addressed in this work, but the methodology for porting and optimizing could be relevant to network and architecture research. Overall, this work contributes to the growing ecosystem of heterogeneous computing for scientific simulations.
Who should read this
CS practitioners and researchers
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